System Design
Front End Design + Verification (DV): Verilog, HVLs (Specman, System Verilog), Methodology (VMM / OVM / eRM / UVM)
Physical Design (PD) I Synthesis I STA: RTL-GDSII design (Block & Full Chip) 40 nm, 32 nm, 28 nm, 22 nm
Analog Custom Design: Circuit design, SPICE simulation, Layout design & verification
DFT: SCAN, ATPG, MBIST, LBIST, BSCAN, Analog and Mixed Signal, BISTs, JTAG 1149.1/1149.6
System Design (SD): High-speed Board design expertise on Schematic Entry, SI analysis, value engineering and analysis for telecom and wireless domains (BT, LTE, WI-Fl)
Emulation I FPGA Design: Fxpertise nn Traditinnal FPGA / Palladium / Zebu / Veloce Emulation platforms
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